Sony Unveils The First 3-layer Stacked CMOS Image With DRAM For Smartphones

Sony Corporation announced the development of the first 3-layer stacked CMOS image sensor with DRAM for smartphones.

The DRAM is the third layer added to the traditional two-layer stacked CMOS image sensor, which includes a layer of back-illuminated structure pixels and a chip with mounted circuits for signal processing. This addition allows the sensor to capture still images of fast-moving objects with minimal focal plane distortion and slow-motion 1080p videos at up to 1000 frames per second. The new sensor also reduces the noise generated between the circuits on each of the three layers. This 21.2MP sensor has 5520 x 3840 effective pixel count. These developments have been presented at the International Solid-State Circuits Conference (ISSCC), which started on February 5, 2017 in San Francisco.